1. Field of the Invention
This invention relates generally to memory for computer systems.
2. Description of Related Art
A number of factors influence the likelihood of failure of Random Access Memory (RAM). Power surges, decay of the chip, and even cosmic rays originating in outer space can cause the data stored in memory to become corrupted. When a memory failure occurs, the byte of data returned from memory in response to a read request is different than the byte of data originally written into memory. In a typical memory chip, these errors go undetected, leading to application or system crashes. For commercial applications in which data integrity is critical, such as web servers, these problems with reliability can result in significant costs to a corporation.
Error Correcting Code (ECC) memory addresses these problems by introducing additional circuitry for testing the accuracy of data as it passes in and out of memory. More specifically, ECC memory stores redundant bits of data and performs additional calculations using these redundant bits to dynamically detect and correct errors.
While ECC memory is an effective means for error detection and correction, the additional circuitry and data bits used to implement ECC memory introduce a number of problems. Primarily, it becomes more difficult to implement synchronous dynamic random access memory (SDRAM) when including error correction circuitry. SDRAM, which includes Double Data Rate (DDR) SDRAM and DDR2 SDRAM, synchronizes with the computer's system bus, so all operations are typically performed within a predetermined time window. If an operation is not performed in the proper time window, a timing violation occurs and often results in a system crash, the very problem ECC memory was designed to avoid. Because ECC memory adds an additional data bit, correctly timing operations and thereby avoiding system crashes becomes more complex. Thus, there is a need for a simple, cost-effective solution for meeting timing requirements when implementing SDRAM with ECC.
The foregoing objects and advantages of the invention are illustrative of those that can be achieved by the various exemplary embodiments and are not intended to be exhaustive or limiting of the possible advantages which can be realized. Thus, these and other objects and advantages of the various exemplary embodiments will be apparent from the description herein or can be learned from practicing the various exemplary embodiments, both as embodied herein or as modified in view of any variation which may be apparent to those skilled in the art. Accordingly, the present invention resides in the novel methods, arrangements, combinations and improvements herein shown and described in various exemplary embodiments.